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FRI-2G.303-1-CCT1-04
SUPPORTING DEVELOPMENT TOOLS FOR FPGA-BASED TRAINING PROCESSORS
Abstract
Experiments with programmable logic devices such as Field Programmable Gate Array (FPGA) have found their place in the lab exercises within various computer engineering courses, especially hardware-oriented ones. FPGA-based training processors, developed as course assignments have proved to be a useful educational tool for studying the basic concepts of computer architecture. One of the advantages of this approach is that students can experiment with different microarchitectures while they reconfigure their projects and modify the instruction set, addressing modes, and machine word size. In the Computer Systems and Technologies Bachelor Curriculum, the Design Technology (DT) course is a precursor to the Computer Architecture (CA) course, and in this sense, lab exercises with FPGA-based training processors will establish a fundamental knowledge base that will help the students better understand the more complex concepts taught in the CA course. This paper presents an overview of the major educational tools prepared for DT lab assignments: a family of educational processors, an assembler, and an assembly language simulator. One of the main requirements for the tools is to be customizable in terms of the machine type, instruction set, and machine word size of the target FPGA-based processor. Several examples are given to show how these hardware and software tools are used in the teaching process.
Keywords
Computer Architecture, CPU, FPGA-based Processor, Instruction Set, Addressing Mode, Assembler, Simulator
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